Mastrovito form of Karatsuba Multiplier for All Trinomials

We present a Matrix-vector form of Karatsuba multiplication over GF (2m) generated by an irreducible trinomial. Based on shifted polynomial basis (SPB), two Mastrovito matrices for different Karatsuba multiplication parts are studied. Then related multiplier architecture is proposed. This design effectively exploits the overlapped entries of the Mastrovito matrices to reduce the space complexity even further. We show that this new type of Karatsuba multiplier is only one TX slower than the fastest bit-parallel multiplier for all trinomials, where TX is the delay of one 2-input XOR gate. Meanwhile its space complexity is roughly reduced by O( 2 4 ) logic gates. Compared with previously proposed bit-parallel Karatsuba multipliers, it is the first time to achieve such time delay bound, while maintain nearly the same space complexity.